ATOMIC_OP_NEEDS_MEMORY_BARRIER, set by configure: http://cgit.freedesktop.org/cairo/tree/build/aclocal.cairo.m4#n203 determines whether "atomic" loads need memory barriers prior to the load itself. I assume this was put in for performance reasons. From the above link, I can see that it's defined to false for x86/x86-64, which makes sense. What seems suspicious is that it's also defined to false for ARM, which has much weaker memory ordering guarantees than x86 by default.
commit 7cc77d1ceea850d5728f4fad59ec18984dbc9ccb Author: Bryce Harrington <bryce@bryceharrington.org> AuthorDate: Wed Oct 14 18:10:22 2015 -0700 Commit: Bryce Harrington <bryce@bryceharrington.org> CommitDate: Wed Oct 14 18:13:42 2015 -0700 build: Use memory barriers for ARM ARM has much weaker memory ordering guarantees than x86 by default, and needs the memory barriers. A similar fix exists in the Skia codebase. Fix suggested by Nathan Froyd. Fixes: FDO #90302 Signed-off-by: Bryce Harrington <bryce@osg.samsung.com> Acked-by: "Henry (Yu) Song" <henry.song@samsung.com>
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