Bug 90350 - [G96] Portal's portal are incorrectly rendered
Summary: [G96] Portal's portal are incorrectly rendered
Status: RESOLVED FIXED
Alias: None
Product: Mesa
Classification: Unclassified
Component: Drivers/DRI/nouveau (show other bugs)
Version: git
Hardware: x86-64 (AMD64) Linux (All)
: medium normal
Assignee: Nouveau Project
QA Contact: Nouveau Project
URL:
Whiteboard:
Keywords:
Depends on:
Blocks:
 
Reported: 2015-05-06 20:46 UTC by Pierre Moreau
Modified: 2015-05-09 17:57 UTC (History)
0 users

See Also:
i915 platform:
i915 features:


Attachments
saturate shader test (2.35 KB, text/plain)
2015-05-09 00:24 UTC, Ilia Mirkin
Details

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Description Pierre Moreau 2015-05-06 20:46:23 UTC
Portal's portals are filled with some matter when running the game on my G96. Running on my MCP79 is fine.
Comment 1 Ilia Mirkin 2015-05-06 20:51:00 UTC
Trace available at:

http://people.freedesktop.org/~imirkin/traces/portal_bug_portalrendering_G96.trace.xz

Verified to render correctly on i965 haswell. Would be nice if someone else with a G96 or older card can verify it also renders wrong. Otherwise it's an issue on the macbook gpu setup.
Comment 2 Pierre Moreau 2015-05-07 20:18:51 UTC
Bisected to

commit 44673512a84c0897c8eddabf4a56e79b7d5b3395
Author: Roy Spliet <rspliet@eclipso.eu>
Date:   Mon Jan 5 00:22:17 2015 +0100

    nv50/ir: Add sat modifier for mul
    
    Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
    Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Comment 3 Ilia Mirkin 2015-05-09 00:24:54 UTC
Created attachment 115652 [details]
saturate shader test

On each of your NV96 and NVAC, please run the attached test through shader_runner. Also remove the "+ arg2" from the result computation and run it again. I suspect that only NV96 + arg2 removed will fail.

[The results that *actually* test clamping are 16, 20, 28, and 36.]
Comment 4 Ilia Mirkin 2015-05-09 17:57:52 UTC
Looks like I was right in my guess. Since NVAC tends to have the same things as NVA0, I'm assuming that FMUL.SAT becomes a thing on G200+. Fix pushed:

commit da136dc07ddb6147d181c96f475b94f6281efd73
Author: Ilia Mirkin <imirkin@alum.mit.edu>
Date:   Sat May 9 03:26:07 2015 -0400

    nv50/ir: only enable mul saturate on G200+
    
    Commit 44673512a84 enabled support for saturating fmul. However
    experimentally this does not seem to work on the older chips. Restrict
    the feature to G200 (NVA0) and later.
    
    Reported-by: Pierre Moreau <pierre.morrow@free.fr>
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90350
    Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
    Tested-by: Pierre Moreau <pierre.morrow@free.fr>
    Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
    Cc: mesa-stable@lists.freedesktop.org


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