Bug 91628 - [BDW Regression] VGA output doesn't work with v4.2-rc6
Summary: [BDW Regression] VGA output doesn't work with v4.2-rc6
Status: CLOSED FIXED
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: XOrg git
Hardware: Other All
: highest normal
Assignee: Ander Conselvan de Oliveira
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard:
Keywords:
Depends on:
Blocks:
 
Reported: 2015-08-13 17:28 UTC by Timo Aaltonen
Modified: 2017-07-24 22:45 UTC (History)
3 users (show)

See Also:
i915 platform: BDW
i915 features: display/DP MST

Attachments
dmesg dump (436.50 KB, text/plain)
2015-08-13 17:28 UTC, Timo Aaltonen 		no flags Details
Patch for setting ddi_pll_sel from DP MST encoder config (1.89 KB, patch)
2015-08-28 10:46 UTC, Ander Conselvan de Oliveira 		no flags Details | Splinter Review
View All

Description Timo Aaltonen 2015-08-13 17:28:53 UTC 
Created attachment 117671 [details]
dmesg dump

Going from 3.19 to 4.2-rc6 broke VGA output on Dell Latitude E5450. Attached is dmesg with debug=14.
Comment 1 Jesse Barnes 2015-08-17 21:05:35 UTC 
Marking as highest prio; VGA is pretty basic and this is a regression.  Do you happen to have a bisect?
Comment 2 Timo Aaltonen 2015-08-26 10:58:11 UTC 
clarification, it's external-only mode that's broken, mirrored/extended work
Comment 3 Timo Aaltonen 2015-08-27 08:15:37 UTC 
I'm told it's broken at least since drm-intel-next-2015-05-22
Comment 4 Timo Aaltonen 2015-08-28 06:27:58 UTC 
bisect points to this commit breaking it

commit 8504c74c7ae48b4b8ed1f1c0acf67482a7f45c93
Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Date:   Fri May 15 11:51:50 2015 +0300

    drm/i915: Preserve ddi_pll_sel when allocating new pipe_config
Comment 5 Ander Conselvan de Oliveira 2015-08-28 10:46:34 UTC 
Created attachment 117965 [details] [review]
Patch for setting ddi_pll_sel from DP MST encoder config

Does the attached patch help? If it doesn't, please provide a dmesg with drm.debug=0x1e.

Note that this is not actually VGA but DP MST. The machine in question is a BDW-ULT.
Comment 6 Timo Aaltonen 2015-08-28 12:33:12 UTC 
Yeah, it's not "native" vga, but some sort of a builtin dongle. Thanks for the patch, I'll get it tested by early next week.
Comment 7 Timo Aaltonen 2015-08-31 06:11:36 UTC 
Apparently the patch works, thanks.
Comment 8 Ander Conselvan de Oliveira 2015-09-14 13:01:01 UTC 
The patch is nightly now:

commit 6fa2d197936ba0b8936e813d0adecefac160062b
Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Date:   Mon Aug 31 11:23:28 2015 +0300

    i915: Set ddi_pll_sel in DP MST path


Should we keep this open until it reaches stable?
Comment 9 Jani Nikula 2015-10-07 13:33:08 UTC 
(In reply to Ander Conselvan de Oliveira from comment #8)
> Should we keep this open until it reaches stable?

Generally, no, but this is now in stable releases, so closing. Thanks for the report.

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