Bug 93087 - [BXT CTS] Conformance not yet achieved for BXT-P
Summary: [BXT CTS] Conformance not yet achieved for BXT-P
Alias: None
Product: Mesa
Classification: Unclassified
Component: Drivers/DRI/i965 (show other bugs)
Version: git
Hardware: x86-64 (AMD64) Linux (All)
: medium normal
Assignee: Neil Roberts
QA Contact: Intel 3D Bugs Mailing List
Depends on:
Reported: 2015-11-23 23:12 UTC by Mark Janes
Modified: 2016-05-28 00:10 UTC (History)
4 users (show)

See Also:
i915 platform:
i915 features:


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Description Mark Janes 2015-11-23 23:12:16 UTC
The following CTS tests fail image comparison:


Kaveh asked me to generate this list in bugzilla so Neil can take a look at the failures.
Comment 1 Mark Janes 2015-12-01 01:13:28 UTC
with 55ffa64daf765b1229364518106a4124bd84b9a7, the six tests listed here began to pass.  However, the following tests regressed:


Sample output:
piglit.es3-cts.shaders.uniform_block.random.all_per_block_buffers.8.bxtm64 (from piglit)
Failing for the past 14 builds (Since Unstable#1700 )
Took 2.3 sec.
Standard Output

/tmp/build_root/m64/bin/cts/glcts --deqp-case=ES3-CTS.shaders.uniform_block.random.all_per_block_buffers.8
dEQP Core GL-CTS-2.0 (0x0052484b) starting..
  target implementation = 'intel-gbm'

Test case 'ES3-CTS.shaders.uniform_block.random.all_per_block_buffers.8'..
Vertex compile time = 20.680000 ms
Fragment compile time = 10.323000 ms
Link time = 2143.562012 ms
  Fail (Image compare failed)


Test run totals:
  Passed:        0/1 (0.00%)
  Failed:        1/1 (100.00%)
  Not supported: 0/1 (0.00%)
  Warnings:      0/1 (0.00%)

Author:     Francisco Jerez <currojerez@riseup.net>
AuthorDate: Mon Nov 23 19:18:26 2015 +0200
Commit:     Francisco Jerez <currojerez@riseup.net>
CommitDate: Thu Nov 26 14:07:58 2015 +0200

    i965/gen9+: Switch thread scratch space to non-coherent stateless access.
    The thread scratch space is thread-local so using the full IA-coherent
    stateless surface index (255 since Gen8) is unnecessary and
    potentially expensive.  On Gen8 and early steppings of Gen9 this is
    not a functional change because the kernel already sets bit 4 of
    HDC_CHICKEN0 which overrides all HDC memory access to be non-coherent
    in order to workaround a hardware bug.
    This happens to fix a full system hang when running any spilling code
    on a pre-production SKL GT4e machine I have on my desk (forcing all
    HDC access to non-coherent from the kernel up to stepping F0 might be
    a good idea though regardless of this patch), and improves performance
    of the OglPSBump2 SynMark benchmark run with INTEL_DEBUG=spill_fs by
    33% (11 runs, 5% significance) on a production SKL GT2 (on which HDC
    IA-coherency is apparently functional so it wouldn't make sense to
    disable globally).
    Reviewed-by: Kristian Høgsberg  <krh@bitplanet.net>
Comment 2 Mark Janes 2015-12-01 18:40:16 UTC
piglit.spec.glsl-1_50.execution.variable-indexing.gs-output-array-vec4-index-wr also fails on BXT with this commit
Comment 3 Mark Janes 2016-05-28 00:10:06 UTC
fixed by mesa 55ffa64daf765b1229364518106a4124bd84b9a7 and mesa 46c0ba60c606d7af5518918bb305cb493227dc18

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