Bug 93738 - [byt] Bad powerwell for display reg read during interrupt handler (valleyview_pipestat_irq_handle)
Summary: [byt] Bad powerwell for display reg read during interrupt handler (valleyview...
Status: CLOSED FIXED
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: DRI git
Hardware: Other All
: medium normal
Assignee: Intel GFX Bugs mailing list
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard:
Keywords:
Depends on:
Blocks:
 
Reported: 2016-01-16 16:55 UTC by Chris Wilson
Modified: 2017-07-24 22:43 UTC (History)
1 user (show)

See Also:
i915 platform: BYT
i915 features: power/Other

Attachments

Description Chris Wilson 2016-01-16 16:55:13 UTC 
[   49.870424] ------------[ cut here ]------------
[   49.870438] WARNING: CPU: 0 PID: 0 at drivers/gpu/drm/i915/intel_uncore.c:638 __unclaimed_reg_debug+0x6d/0x80()
[   49.870441] Unclaimed register detected after reading register 0x1f0024
[   49.870446] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.4.0+ #1046
[   49.870448] Hardware name: \xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff \xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff\xffffffff/DN2820FYK, BIOS FYBYT10H.86A.0032.2014.0414.1437 04/14/2014
[   49.870452]  ffffffff81807110 ffff88023fc03d30 ffffffff81286f3f ffff88023fc03d78
[   49.870457]  ffff88023fc03d68 ffffffff8104d751 00000000001f0024 0000000000000000
[   49.870461]  0000000000000001 ffff880235050080 0000000000000001 ffff88023fc03dc8
[   49.870465] Call Trace:
[   49.870468]  <IRQ>  [<ffffffff81286f3f>] dump_stack+0x44/0x55
[   49.870478]  [<ffffffff8104d751>] warn_slowpath_common+0x81/0xc0
[   49.870482]  [<ffffffff8104d80c>] warn_slowpath_fmt+0x4c/0x50
[   49.870485]  [<ffffffff813d48fd>] __unclaimed_reg_debug+0x6d/0x80
[   49.870488]  [<ffffffff813d4e10>] vlv_read32+0x270/0x2a0
[   49.870494]  [<ffffffff8138502b>] valleyview_pipestat_irq_handler+0x9b/0x1c0
[   49.870497]  [<ffffffff813891ec>] valleyview_irq_handler+0xbc/0x160
[   49.870502]  [<ffffffff8108df88>] handle_irq_event_percpu+0x78/0x180
[   49.870506]  [<ffffffff8108e0bf>] handle_irq_event+0x2f/0x50
[   49.870510]  [<ffffffff810915f0>] handle_edge_irq+0xb0/0x180
[   49.870514]  [<ffffffff81005fdd>] handle_irq+0x1d/0x30
[   49.870519]  [<ffffffff815d2a9b>] do_IRQ+0x4b/0xd0
[   49.870524]  [<ffffffff815d10c1>] common_interrupt+0x81/0x81
[   49.870526]  <EOI>  [<ffffffff814d95d5>] ? cpuidle_enter_state+0x135/0x260
[   49.870533]  [<ffffffff814d9737>] cpuidle_enter+0x17/0x20
[   49.870538]  [<ffffffff81085937>] cpu_startup_entry+0x2a7/0x300
[   49.870542]  [<ffffffff815cb4f7>] rest_init+0x77/0x80
[   49.870546]  [<ffffffff81b05f30>] start_kernel+0x4e6/0x4f3
[   49.870550]  [<ffffffff81b0544e>] x86_64_start_reservations+0x2a/0x2c
[   49.870553]  [<ffffffff81b0553a>] x86_64_start_kernel+0xea/0xed
[   49.870555] ---[ end trace a36fe93ff40591ce ]---
Comment 1 Ville Syrjala 2016-02-18 16:19:32 UTC 
Hmm. I wonder why were not getting this all the time. Or are we?

--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1651,6 +1651,12 @@ static void valleyview_pipestat_irq_handler(struct drm_device *dev, u32 iir)
        int pipe;
 
        spin_lock(&dev_priv->irq_lock);
+
+       if (!dev_priv->display_irqs_enabled) {
+               spin_unlock(&dev_priv->irq_lock);
+               return;
+       }
+
        for_each_pipe(dev_priv, pipe) {
                i915_reg_t reg;
                u32 mask, iir_bit = 0;
Comment 2 Chris Wilson 2016-02-18 16:54:24 UTC 
Had to remember that the warning was disabled in -nightly!

Patch worksforme.
Comment 3 Ville Syrjala 2016-02-25 16:06:44 UTC 
commit 1ca993d237a587be19dd58cfe27f1e9093291320
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date:   Thu Feb 18 21:54:26 2016 +0200

    drm/i915: Skip PIPESTAT reads from irq handler on VLV/CHV when power well is down

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