Bug 108059 - [icl rps][CI] [DRMTIP] igt@pm_rps@* - fail - Test assertion failure function waitboost - post_freqs[CUR] < post_freqs[MAX]
Summary: [icl rps][CI] [DRMTIP] igt@pm_rps@* - fail - Test assertion failure function ...
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: XOrg git
Hardware: Other Linux (All)
: medium normal
Assignee: Mika Kuoppala
QA Contact: Intel GFX Bugs mailing list
Whiteboard: Triaged, ReadyForDev
: 108344 (view as bug list)
Depends on:
Reported: 2018-09-25 13:27 UTC by Lakshmi
Modified: 2019-04-11 07:46 UTC (History)
4 users (show)

See Also:
i915 platform: ICL
i915 features: power/Other


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Description Lakshmi 2018-09-25 13:27:02 UTC
The test igt@pm_rps@reset hits the following assertion on our ICL system:
Starting subtest: reset
(pm_rps:1373) CRITICAL: Test assertion failure function waitboost, file ../tests/pm_rps.c:608:
(pm_rps:1373) CRITICAL: Failed assertion: post_freqs[CUR] < post_freqs[MAX]
(pm_rps:1373) CRITICAL: error: 600 >= 600
Subtest reset failed.

Comment 1 CI Bug Log 2019-03-13 11:33:53 UTC
The CI Bug Log issue associated to this bug has been updated.

### New filters associated

* ICL: igt@pm_rps@min-max-config-loaded - Failed assertion: freqs[MAX] &lt;= freqs[CUR] (No new failures associated)
Comment 2 CI Bug Log 2019-03-13 11:39:29 UTC
The CI Bug Log issue associated to this bug has been updated.

### New filters associated

* ICL:  igt@pm_rps@.* - Failed assertion: boost_freqs[CUR] == boost_freqs[BOOST] (No new failures associated)
Comment 3 Chris Wilson 2019-03-13 11:55:15 UTC
*** Bug 108344 has been marked as a duplicate of this bug. ***
Comment 4 Francesco Balestrieri 2019-04-11 04:33:56 UTC
Will be fixed once https://patchwork.freedesktop.org/series/59278/ is merged.
Comment 5 Chris Wilson 2019-04-11 07:46:17 UTC
commit 917dc6b53c273dd7e026f158ad4894ae366da326 (HEAD -> drm-intel-next-queued, 
drm-intel/for-linux-next, drm-intel/drm-intel-next-queued)
Author: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Date:   Wed Apr 10 13:59:22 2019 +0300

    drm/i915: Use Engine1 instance for gen11 pm interrupts
    With gen11 the interrupt registers are shared between 2 engines,
    with Engine1 instance being upper word and Engine0 instance being
    lower. Annoyingly gen11 selected the pm interrupts to be in the
    Engine1 instance.
    Rectify the situation by shifting the access accordingly,
    based on gen.
    v2: comments, warn on overzealous rps_events
    Bugzilla: https://bugzilla.freedesktop.org/show_bug.cgi?id=108059
    Testcase: igt/i915_pm_rps@min-max-config-loaded
    Cc: Chris Wilson <chris@chris-wilson.co.uk>
    Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
    Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
    Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
    Link: https://patchwork.freedesktop.org/patch/msgid/20190410105923.18546-6-mika.kuoppala@linux.intel.com

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