Bug 67345 - [BayTrail-M] [drm:intel_pipe_config_compare] *ERROR* mismatch in clock (expected 146250, found 0)
Summary: [BayTrail-M] [drm:intel_pipe_config_compare] *ERROR* mismatch in clock (expec...
Status: CLOSED FIXED
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: unspecified
Hardware: All All
: medium normal
Assignee: Jesse Barnes
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard:
Keywords:
Depends on:
Blocks:
 
Reported: 2013-07-26 09:37 UTC by Guang Yang
Modified: 2017-10-06 14:44 UTC (History)
4 users (show)

See Also:
i915 platform:
i915 features:


Attachments
dmesg after booting (66.83 KB, text/plain)
2013-07-26 09:37 UTC, Guang Yang
no flags Details
Prototype vlv_crtc_clock_get (3.75 KB, patch)
2013-07-28 13:05 UTC, Chris Wilson
no flags Details | Splinter Review
Prototype vlv_crtc_clock_get (3.76 KB, patch)
2013-07-28 13:06 UTC, Chris Wilson
no flags Details | Splinter Review
the whole system booting dmesg (98.95 KB, text/plain)
2013-09-16 08:39 UTC, cancan,feng
no flags Details
wip vlv clock get patch (1.96 KB, text/plain)
2013-09-18 20:39 UTC, Jesse Barnes
no flags Details
dmesg: error also exists (61.79 KB, text/plain)
2013-09-23 07:17 UTC, shui yangwei
no flags Details

Description Guang Yang 2013-07-26 09:37:48 UTC
Created attachment 83027 [details]
dmesg after booting

System Environment:
--------------------------------------------
Kernel: (drm-intel-nightly)d861e3387650296f1fca2a4dd0dcd380c8fdddad
Some additional commit info:
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Wed Jul 24 23:25:03 2013 +0200

    drm/i915: fix reference counting in i915_gem_create

Bug detail Description:
--------------------------------------------
On our BayTrail platform  has *ERROR* mismatch in clock (expected 146250, found 0) and Call Trace in dmesg after booting just like this:

[    1.881475] [drm:intel_pipe_config_compare] *ERROR* mismatch in clock (expected 146250, found 0)
[    1.881478] ------------[ cut here ]------------
[    1.881605] WARNING: at drivers/gpu/drm/i915/intel_display.c:8570 check_crtc_state+0x6ba/0x701 [i915]()
[    1.881606] pipe state doesn't match!
[    1.881612] Modules linked in: i915(+) drm_kms_helper drm video button
[    1.881616] CPU: 2 PID: 1164 Comm: systemd-udevd Not tainted 3.10.0-rc7_drm-intel-next-queued_d861e3_20130725_+ #6160
[    1.881618] Hardware name: Intel Corp. VALLEYVIEW B0 PLATFORM/NOTEBOOK, BIOS BBAYCRB1.X64.0047.R21.1306111752 BBAY_X64_R_v47_21 06/11/2013
[    1.881622]  ffffffff816e7c25 0000000000000000 ffffffff8102c53d ffff88003f9e1320
[    1.881625]  ffff88003f9e1328 0000000000000000 ffff8800753ba000 ffff88003f99d800
[    1.881628]  ffff88003f9e1398 ffff88006e0bc000 ffffffff8102c5ed ffffffffa00bfad2
[    1.881629] Call Trace:
[    1.881637]  [<ffffffff816e7c25>] ? dump_stack+0xd/0x17
[    1.881643]  [<ffffffff8102c53d>] ? warn_slowpath_common+0x5f/0x77
[    1.881647]  [<ffffffff8102c5ed>] ? warn_slowpath_fmt+0x45/0x4a
[    1.881680]  [<ffffffffa007c495>] ? check_crtc_state+0x6ba/0x701 [i915]
[    1.881720]  [<ffffffffa0085b58>] ? intel_modeset_check_state+0x36f/0x5e8 [i915]
[    1.881753]  [<ffffffffa0085e41>] ? intel_set_mode+0x1d/0x27 [i915]
[    1.881787]  [<ffffffffa0086441>] ? intel_crtc_set_config+0x5f6/0x7e5 [i915]
[    1.881799]  [<ffffffffa001ad86>] ? drm_mode_set_config_internal+0x44/0xac [drm]
[    1.881805]  [<ffffffffa0052c6e>] ? drm_fb_helper_set_par+0x55/0x9a [drm_kms_helper]
[    1.881810]  [<ffffffff812eec02>] ? fbcon_init+0x2ff/0x408
[    1.881815]  [<ffffffff8133aed8>] ? visual_init+0xaf/0x102
[    1.881818]  [<ffffffff8133c77f>] ? do_bind_con_driver+0x1a1/0x2ca
[    1.881822]  [<ffffffff8133c920>] ? do_take_over_console+0x33/0x3e
[    1.881826]  [<ffffffff812ee2ef>] ? do_fbcon_takeover+0x53/0x96
[    1.881830]  [<ffffffff816efcac>] ? notifier_call_chain+0x2e/0x59
[    1.881835]  [<ffffffff81048e1b>] ? __blocking_notifier_call_chain+0x43/0x5d
[    1.881838]  [<ffffffff812e6231>] ? register_framebuffer+0x21d/0x284
[    1.881843]  [<ffffffffa0052b6a>] ? drm_fb_helper_initial_config+0x3aa/0x459 [drm_kms_helper]
[    1.881854]  [<ffffffffa0019455>] ? drm_mode_config_reset+0xad/0xcc [drm]
[    1.881858]  [<ffffffff810c9ab7>] ? __kmalloc+0x63/0xf3
[    1.881885]  [<ffffffffa005cd6f>] ? i915_write32+0x6d/0x94 [i915]
[    1.881913]  [<ffffffffa006009e>] ? i915_driver_load+0xc37/0xe1f [i915]
[    1.881917]  [<ffffffff81624753>] ? pcibios_allocate_resources+0x1d9/0x1d9
[    1.881923]  [<ffffffff81354818>] ? get_device+0x10/0x1c
[    1.881935]  [<ffffffffa0016ca5>] ? drm_get_pci_dev+0x14d/0x254 [drm]
[    1.881939]  [<ffffffff81357f4a>] ? driver_probe_device+0x19e/0x19e
[    1.881944]  [<ffffffff812d6a61>] ? local_pci_probe+0x16/0x26
[    1.881947]  [<ffffffff812d731f>] ? pci_device_probe+0xbc/0xe0
[    1.881951]  [<ffffffff81357e36>] ? driver_probe_device+0x8a/0x19e
[    1.881954]  [<ffffffff81357f9d>] ? __driver_attach+0x53/0x73
[    1.881957]  [<ffffffff813566f8>] ? bus_for_each_dev+0x4b/0x7c
[    1.881961]  [<ffffffff8135766f>] ? bus_add_driver+0xdc/0x1fb
[    1.881964]  [<ffffffff813584bc>] ? driver_register+0x89/0x101
[    1.881967]  [<ffffffffa00d8000>] ? 0xffffffffa00d7fff
[    1.881971]  [<ffffffff81000257>] ? do_one_initcall+0x75/0x102
[    1.881977]  [<ffffffff8106c9ad>] ? load_module+0x17b2/0x1a8a
[    1.881980]  [<ffffffff81069b4c>] ? sys_getegid16+0x40/0x40
[    1.881985]  [<ffffffff8106a1f9>] ? copy_module_from_fd+0xcc/0xe2
[    1.881989]  [<ffffffff8106cd7e>] ? SyS_finit_module+0x4e/0x62
[    1.881994]  [<ffffffff816f1fd2>] ? system_call_fastpath+0x16/0x1b
[    1.881996] ---[ end trace 3e81be0dc5f9fb94 ]---

our platform is :
00:00.0 Host bridge [0600]: Intel Corporation ValleyView SSA-CUnit [8086:0f00] 
00:02.0 VGA compatible controller [0300]: Intel Corporation ValleyView Gen7 [8086:0f31] 

I attach the dmesg after booting.

Reproduce Steps:
---------------------------------------------
1.booting up machine
2.dmesg | grep "ERROR"
Comment 1 Daniel Vetter 2013-07-26 09:39:22 UTC
Clock mismatch is for Jesse.
Comment 2 Chris Wilson 2013-07-28 13:05:18 UTC
Created attachment 83120 [details] [review]
Prototype vlv_crtc_clock_get
Comment 3 Chris Wilson 2013-07-28 13:06:29 UTC
Created attachment 83121 [details] [review]
Prototype vlv_crtc_clock_get
Comment 4 Gordon Jin 2013-09-13 05:54:01 UTC
any progress?

Chris, do you need QA to try your patch?
Comment 5 Daniel Vetter 2013-09-13 07:50:40 UTC
Yup, a quick testrun of that patch would be good.
Comment 6 Daniel Vetter 2013-09-13 08:08:34 UTC
Dmesg doesn't seem to have drm.debug enabled.
- Please attach a drm.debug dmesg with the backtrace
- Is this the same as bug #69248 i.e. only happens when edp is enabled, but not when only vga (or other ports) are enabled?
Comment 7 cancan,feng 2013-09-16 07:40:42 UTC
(In reply to comment #3)
> Created attachment 83121 [details] [review] [review]
> Prototype vlv_crtc_clock_get

Hi, I applied this patch on latest -next-queued kernel but can't build successfully.
Comment 8 cancan,feng 2013-09-16 08:02:10 UTC
(In reply to comment #6)
> Dmesg doesn't seem to have drm.debug enabled.
> - Please attach a drm.debug dmesg with the backtrace
> - Is this the same as bug #69248 i.e. only happens when edp is enabled, but
> not when only vga (or other ports) are enabled?

This "[drm:intel_pipe_config_compare] *ERROR* mismatch in clock" happens both on eDP and VGA.
Comment 9 cancan,feng 2013-09-16 08:39:47 UTC
Created attachment 85894 [details]
the whole system booting dmesg
Comment 10 Jesse Barnes 2013-09-18 20:39:55 UTC
Created attachment 86104 [details]
wip vlv clock get patch

Chris, can you try this one out?  My system is busted atm.  It probably needs fixes to the calculations, but my system died right as I was about to try it.
Comment 11 Jesse Barnes 2013-09-18 20:40:20 UTC
Chris, please see last patch.
Comment 12 Jesse Barnes 2013-09-19 20:28:42 UTC
Please test these two patches:

http://lists.freedesktop.org/archives/intel-gfx/2013-September/033543.html
Comment 13 shui yangwei 2013-09-22 06:39:34 UTC
(In reply to comment #12)
> Please test these two patches:
> 
> http://lists.freedesktop.org/archives/intel-gfx/2013-September/033543.html

I can't apply this patch on latest -next-queued and -nightly, can you re-check it?
Comment 14 Daniel Vetter 2013-09-22 10:01:25 UTC
Updated version of the patch (only one patch now):

https://patchwork.kernel.org/patch/2920201/
Comment 15 shui yangwei 2013-09-23 07:17:08 UTC
Created attachment 86335 [details]
dmesg: error also exists

(In reply to comment #14)
> Updated version of the patch (only one patch now):
> 
> https://patchwork.kernel.org/patch/2920201/

I have tested this patch on latest -next-queued, and this error also exists. dmesg is appended here.
Comment 16 Chris Wilson 2013-09-24 16:10:02 UTC
Using the latest patch, I get found=8551, expected=138530
Comment 17 Chris Wilson 2013-09-25 21:11:56 UTC
Hmm, 'tis working now.

[10412.590966] mdiv=11625351, m1=3, m2=81, n=5, p1=3, p2=2
[10412.590973] vco=4860000, dot=1620000, clock=162000


diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5741d48..5219fdc 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5083,10 +5083,10 @@ static void vlv_crtc_clock_get(struct intel_crtc *crtc,
 {
        struct drm_device *dev = crtc->base.dev;
        struct drm_i915_private *dev_priv = dev->dev_private;
+       const int refclk = 100000;
        int pipe = pipe_config->cpu_transcoder;
        intel_clock_t clock;
        u32 mdiv;
-       int refclk = 100000, fastclk, update_rate;
 
        mutex_lock(&dev_priv->dpio_lock);
        mdiv = vlv_dpio_read(dev_priv, pipe, DPIO_DIV(pipe));
@@ -5098,12 +5098,16 @@ static void vlv_crtc_clock_get(struct intel_crtc *crtc,
        clock.p1 = (mdiv >> DPIO_P1_SHIFT) & 7;
        clock.p2 = (mdiv >> DPIO_P2_SHIFT) & 0x1f;
 
-       update_rate = refclk / clock.n;
-       clock.vco = update_rate * clock.m1 * clock.m2;
-       fastclk = clock.vco / clock.p1 / clock.p2;
-       clock.dot = (2 * fastclk);
+printk("mdiv=%x, m1=%d, m2=%d, n=%d, p1=%d, p2=%d\n",
+mdiv, clock.m1, clock.m2, clock.n, clock.p1, clock.p2);
+
+       clock.vco = refclk * clock.m1 * clock.m2 / clock.n;
+       clock.dot = 2 * clock.vco / (clock.p1 * clock.p2);
 
        pipe_config->port_clock = clock.dot / 10;
+
+printk("vco=%d, dot=%d, clock=%d\n",
+clock.vco, clock.dot, pipe_config->port_clock);
 }
Comment 18 Jesse Barnes 2013-09-25 21:46:07 UTC
Fixed by:
58fc1e077db44f7ed13943426bb38c8e2740b7cc and
75b6ef3a51672c2cb25a100860df22e3688c00a6
Comment 19 shui yangwei 2013-09-26 01:57:04 UTC
(In reply to comment #18)
> Fixed by:
> 58fc1e077db44f7ed13943426bb38c8e2740b7cc and
> 75b6ef3a51672c2cb25a100860df22e3688c00a6

OK, this error disappeared, verified here. 

Bug 69248 - [Baytrail-M] mismatch in clock for eDP   is the same with this bug.
Comment 20 Elizabeth 2017-10-06 14:44:44 UTC
Closing old verified.


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