Created attachment 97478 [details] screenshot please see the attached files. that's what i get building mesa after commit: acf55e73252e46fa51378ef4b23c94a89902ae1c so that^ is the last working commit of here (OLAND).
Please attach the corresponding Xorg.0.log and output of glxinfo. It's hard to believe that commit causing the problem; it shouldn't make any functional difference.
Created attachment 97523 [details] Xorg.log
(In reply to comment #1) > Please attach the corresponding Xorg.0.log and output of glxinfo. > > It's hard to believe that commit causing the problem; it shouldn't make any > functional difference. true. that's the "last working" commit. a commit after that breaks things. ok, i'm gonna try with the very next commit.
(In reply to comment #3) > (In reply to comment #1) > > Please attach the corresponding Xorg.0.log and output of glxinfo. > > > > It's hard to believe that commit causing the problem; it shouldn't make any > > functional difference. > > true. that's the "last working" commit. a commit after that breaks things. > ok, i'm gonna try with the very next commit. title was wrong. so this is the bad commit: 71254732db12c8813c002425b5c1b7c31bf56f65
I cannot reproduce this on Cape Verde.
Please attach your dmesg.
*** Bug 77602 has been marked as a duplicate of this bug. ***
I had the same issue (bug 77602), and disabling forcing si_dma_copy to always go to the fallback solves the tiling issues and the glitches. I have a CAPE VERDE card (hd7730m).
We may need a similar fix for async dma as we did for displays. See bug 71488.
The async dma code is probably setting the band size incorrectly on these asics.
*bank size
I have tested to force to go to the fallback only before calling si_dma_copy_tile, to test if si_dma_copy_buffer was working. I didn't notice any glitch or tiling problem with heaven, but I don't know if si_dma_copy_buffer is actually used or not.
Created attachment 97565 [details] dmesg.log
Created attachment 97566 [details] [review] possible fix Does the attached patch fix the issue?
I have tested to return V_009910_ADDR_SURF_16_BANK in case 8 in si_num_banks, instead of V_009910_ADDR_SURF_8_BANK, and unigine have no glitches anymore. I test your patch right away.
Your patch works for me.
(In reply to comment #14) > Created attachment 97566 [details] [review] [review] > possible fix > > Does the attached patch fix the issue? yep, thanks.
Pushed: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7489f3eedafbdad905158196873c8b3f5ccb546f
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