Bug 8724 - Illegal instruction in Mesa with Pentium series CPU
Summary: Illegal instruction in Mesa with Pentium series CPU
Alias: None
Product: Mesa
Classification: Unclassified
Component: Mesa core (show other bugs)
Version: git
Hardware: x86 (IA32) Linux (All)
: medium normal
Assignee: mesa-dev
QA Contact:
: 14421 15061 15196 16225 16385 (view as bug list)
Depends on:
Reported: 2006-10-22 22:43 UTC by veelion (inactive account)
Modified: 2011-08-25 18:56 UTC (History)
5 users (show)

See Also:
i915 platform:
i915 features:

Xsession.d script to set MESA_NO_ASM selectively (432 bytes, text/plain)
2008-06-02 14:56 UTC, Tormod Volden

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Description veelion (inactive account) 2006-10-22 22:43:28 UTC
platform: 945G and 915G + Pentium D CPU (ia32e),
OS: Fedora Core 5 (64-bit)
running glean on 945G and 915G with Pentium D cpu installed 64-bit OS, glean 
would abort with "Illegal instruction" after running several minutes. when debug 
glean, find the information,
_mesa_x86_64_transform_points4_identity () at x86-64/xform4.S:196
196			prefetch 64(%rsi)
Current language:  auto; currently asm

"prefetch" and "prefetchw" are seems not  supported in Pentium series CPU.
Comment 1 Roland Scheidegger 2006-10-23 11:48:58 UTC
Yes, the x86_64 code in Mesa is currently AMD only, as it uses 3dnow. Some
functions probably could be fixed easily (those only using prefetch, prefetchw
and femms by exchanging these instructions with the equivalent sse
instructions), however some actually use the instructions of 3dnow operating on
vec2 data, (pfmul, pfadd etc.), they look difficult to optimize with sse (they
aren't optimized in the x86 sse path neither).
As a workaround, use a build without assembly optimization (linux-dri instead of
Comment 2 Gordon Jin 2007-03-14 19:34:22 UTC
The bug priority was upgraded (P2->high) with the bugzilla configuration change.
I'm Changing the priority back to the normal one.
Sorry for the spam.
Comment 3 Roland Scheidegger 2008-02-08 05:34:55 UTC
*** Bug 14421 has been marked as a duplicate of this bug. ***
Comment 4 Priit Laes (irc: plaes) 2008-03-04 22:06:19 UTC
Why enhancement when it causes crash?
Comment 5 Roland Scheidegger 2008-03-16 18:48:07 UTC
*** Bug 15061 has been marked as a duplicate of this bug. ***
Comment 6 Shuang He 2008-03-25 01:49:10 UTC
*** Bug 15196 has been marked as a duplicate of this bug. ***
Comment 7 Tormod Volden 2008-06-02 14:56:41 UTC
Created attachment 16879 [details]
Xsession.d script to set MESA_NO_ASM selectively

I am trying to put together a workaround for Ubuntu and Debian (https://bugs.launchpad.net/bugs/87661), until this gets fixed the Right Way. Could anyone here please be so kind as to comment on this workaround?
Comment 8 haihao 2008-06-03 23:03:15 UTC
*** Bug 16225 has been marked as a duplicate of this bug. ***
Comment 9 WuNian 2008-06-16 19:49:19 UTC
There is another "Illegal instruction" in xform4.S:

[Switching to Thread 46991100600320 (LWP 3791)]
_mesa_x86_64_transform_points4_3d_no_rot () at x86-64/xform4.S:225
225             prefetch (%rdx)
Current language:  auto; currently asm
(gdb) bt
#0  _mesa_x86_64_transform_points4_3d_no_rot () at x86-64/xform4.S:225
#1  0x00002abcf80d6c29 in run_vertex_stage (ctx=0xa5b670,
    stage=<value optimized out>) at tnl/t_vb_vertex.c:144
#2  0x00002abcf80cd1eb in _tnl_run_pipeline (ctx=0xa5b670)
    at tnl/t_pipeline.c:158
#3  0x00002abcf802f0d0 in intelRunPipeline (ctx=0xa5b670) at intel_tris.c:906
#4  0x00002abcf80cd714 in _tnl_draw_prims (ctx=0xa5b670, arrays=0xa995b0,
    prim=0xa97d94, nr_prims=1, ib=0x0, min_index=<value optimized out>,
    max_index=3) at tnl/t_draw.c:402
#5  0x00002abcf80c58de in vbo_exec_vtx_flush (exec=0xa97b50)
    at vbo/vbo_exec_draw.c:215
#6  0x00002abcf80c13fd in vbo_exec_FlushVertices (ctx=<value optimized out>,
    flags=11064832) at vbo/vbo_exec_api.c:700
#7  0x00002abcf815eb4e in _mesa_ReadPixels (x=20, y=20, width=1, height=1,
    format=6407, type=5126, pixels=0x7fffb4c40bf0) at main/drawpix.c:294
Comment 10 Roland Scheidegger 2008-06-17 18:43:10 UTC
*** Bug 16385 has been marked as a duplicate of this bug. ***
Comment 11 Ian Romanick 2008-09-28 20:35:24 UTC
Fixed by commit 2b8d8989fb6f9c36baf166fc715182a1407ebadb to master.  This patch has also been cherry-picked to the intel-2008-q3 branch as commit d13b5a0e87cb6d820a152e0373f017bc8fe9c49a.
Comment 12 Adam Jackson 2009-08-24 12:24:45 UTC
Mass version move, cvs -> git

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